The MATLAB® modeling environment is a product of The MathWorks, Inc. of Natick, Mass., which provides engineers, scientists, mathematicians, educators and other professionals across a diverse range of industries with an environment for technical computing applications. The MATLAB® programming language is an intuitive high performance language and technical computing environment that provides mathematical and graphical tools for mathematical computation, data analysis, visualization and algorithm development. MATLAB® is used to solve and/or understand complex engineering and scientific problems by developing mathematical models that simulate the problem. A model is prototyped, tested and analyzed by running the model under multiple boundary conditions, data parameters, or just a number of initial guesses.
Besides using a textual modeling environment, such as the MATLAB® modeling environment or SystemC, a user may use graphical modeling environments, such as the Simulink® modeling environment from The MathWorks, Inc. of Natick, Massachusetts, to create a model. The Simulink® modeling environment supports block diagram modeling, and such block diagrams are commonly used to create models that represent a design or algorithm of an implementation for computational hardware or wetware. One or more block diagrams may represent a design for a target hardware platform. A “target hardware platform” may include a single computational hardware component or multiple computational hardware components. A target hardware platform may also have other elements such as memory, interfaces, or other integrated circuits (ICs). It may also have a number of such elements on one chip and be a so-called System on Chip (SoC). The term “computational hardware component” may generally be used to refer to any hardware component with computational capability, such as, for example, a digital signal processor (DSP), general-purpose processor (GPP), graphics processing unit (GPU), microcontroller, application specific integrated circuit (ASIC), application-specific instruction-set processor (ASIP), field-programmable gate arrays (FPGA), biocomputer, quantum computer, etc.
An automatic code generation application can automatically generate code and build programs from a textual model or graphical model for implementation on the computational platform based on the design.
The process of translating a model of a system into a system implementation is computationally intensive and ordinarily performed in many steps. In one approach, the elements of a graphical model are directly translated into an implementation representation. In another approach, an intermediate representation is used to facilitate this translation process. Intermediate representations typically allow for a change in levels of abstraction from a source language to a target language and a corresponding system implementation. The intermediate representation may be generated in memory and not written to file, or it may be captured on disk. Graphical modeling tools, such as those that are block diagram based, attempt to simplify the process of conceptualizing, designing, simulating and finally implementing in hardware computing systems. Such hardware systems may be, for example, custom signal processing systems. In a graphical context, a block diagram can be a representation of a real-world system through a diagram containing nodes referred to as “blocks” interconnected by lines. Blocks are functional entities that perform actions and transformations on data processed by the system. The lines represent data, called “signals,” that are output and input of the various blocks.
Signal processing systems generally include a number of components that perform a series of signal operations or transformations to one or more input signals in order to obtain a set of desired output signals. This processing may be carried out using sample-based processing or frame-based processing.
In sample-based processing, each component acts upon one data sample of its input signal, acquired at one instant in time, every time it executes. A data sample may be scalar in nature, that is, a single data element. It may also be a vector, a matrix, a higher-dimensional regular array of data elements, etc. A data sample may also be irregular or non-uniform in structure, depending upon the nature of the intended application.
In frame-based processing, each component acts upon a collection of data samples acquired over time, every time it executes. The collection may have periodic sampling interval (that is, uniformly sampled over time) or may be aperiodic with respect to the sampling interval, that is, non-uniformly sampled over time. The temporal collection is known as a frame of data samples, and may be recorded in memory as a buffer.
Frame-based processing has several advantages over sample-based processing. It decreases the number of times components need to communicate with each other in order to process a given number of samples. It also may reduce the need for intricate storage and indexing facilities for blocks that perform frame-based operations. This reduction in communication decreases the messaging overhead between components both in software and hardware implementations of the overall system. Another scenario where frame-based processing reduces messaging overhead may be understood by considering a digital signal processing (DSP) system that is implemented as a cascade of a variety of components using an analog to digital (A/D) converter. In many scenarios, the A/D converter is serviced by an interrupt service routine (ISR). Each call to the ISR has a fixed performance overhead regardless of the number of samples obtained from the A/D converter at each interrupt. Therefore, it is beneficial to reduce the number of times the ISR is executed by bundling up frames of samples during each call to the ISR.
There are also a variety of signal operations and transformations that have more efficient algorithmic implementation when more than one sample is processed at each execution step of the algorithm. An example of such an operation is Finite Impulse Response (FIR) digital filtering, which may be implemented either through a direct sample-based convolution or through the frame-based Overlap-Add (OLA) algorithm.
Once the system designer has modeled a system using graphical block diagram based tools, it may be necessary to design the actual hardware system. Modern day electronic circuits may be described using a hardware description language (HDL).
“HDL” refers to any language from a class of computer languages for formal description of hardware. It can describe hardware operation, its design, and tests to verify its operation by means of simulation. HDL provides a standard text-based expression of the temporal behavior and/or spatial structure of the hardware. The syntax and semantics of an HDL include explicit notations for expressing time and concurrency, which are primary attributes of hardware.
Using the hardware description in HDL code, a software program called an HDL synthesis tool can infer hardware logic operations from the hardware description statements and produce an equivalent list of generic hardware primitives to implement the specified behavior.